TCIII-6400ST DDR5 UDIMM/ SODIMM

NEW! DDR5 UDIMM or SODIMM Tester

Key Features

• Supports DDR5 UDIMM or DDR5 SODIMM
• Supports DDR5 speed up to 6400Mbps
• Clock Frequency from 1600MHz to 3200MHz
• DDR5 PMIC test (unbuffered DIMM)
• AC/DC Parametric tests
• Non-ECC/ (64-bit)
• Graphical interface displays Failed IC's and Failed DQ's
• Linear Feedback Shift Register (LFSR)

DC Tests

Power Short Test

Idd Measurement

• Idd4R_Opt_BurstR
• Idd4W_Opt_BurstW

DDR5 PMIC (Power Management IC) Test

FEATURES

DDR5 (UDIMM/ SODIMM) PMIC

• DDR5 Powers are controlled by PMIC on DIMM

PMIC Test

• Read ID
• Register Test
• Program/ Secure Mode Test
• VR_EN Test (Power Up/ Down Sequence Test)
• PG/ Error Injection Test
• Over Clock Chip Test
• Read/ Program DIMM Vendor Register
• Input/ Output Voltage Monitor
• Output/ Current/ Power Monitor
• SPD Hub/ PMIC Temperature Montior
• Read DIMM Host Region Register (0x00 ~ 0x3F)

Multi-Site Networking

Don't let old technology keep you from getting ahead

TurboCATS can meet all of your testing needs while keeping costs at a minimum. Costs are minimized since there will be no need for additional manual labor to handle the increased capacity. The users can simply integrate the new unit into their existing network and utilize the PC that is already in place.

Network-Interface Features

• Network-ready and high-performance
• Firmware upgrade via internet
• Graphical user interface software
• Real-time configuration and monitoring
• Advanced reporting
• Remote file editing
• Ideal for powered productivity

Enhanced Features

Seamless multitasking

Test Capabilities

• 3200, 3600, 4200, 4800, 5200, 5800, 6400 (Mbps)
• Clock Frequency from 1600 to 3200 (MHz)
• 32-bit data channel (32-bit data) x 2 channels per rank, total 64 bits per rank
• Supports Non-ECC/ (64-bit)
• Supports DDR5 UDIMM or DDR5 SODIMM

Power Short

The TCIII-6400ST DDR5 UDIMM or DDR5 SODIMM tester detects the resistance between the corresponding Power pin and ground. If the test result is lower than the set threshold value, it is determined that a Power short pin has occurred.

• VIN_BULK - VSS
• DDR5 Powers – VSS (Read PMIC output voltage pins)

AC/ DC Parametric and Functional Tests

• DC Parametric tests: Power Short and defined IDD test
• AC standard industry test patterns
• DDR5 PMIC test (Unbuffered DIMM)
• SPD Programming, Read/ Write, Software Write Protect
• C-programming user script to create the customized test patterns

Powerful Failure Analysis Tools

• Graphical interface displays Failed IC’s and Failed DQ’s
• Error logging of Row/ Column/ Banks/ DQ’s
• Supports LFSR (Linear Feedback Shift Register)
• Useful tools include Bit Failure Mapping and specific parameters for Shmoo Plot functions

GUI Failure Analysis Tools

Graphical Identification of DQ's

Graphically represents the failed DQs' locations.
At the end of the test, the appropriate color will indicate the failed ICs (red) on the module. The indicated color reset automatically at the start of each test. The software uses a graphical picture to illustrate the test failures at the hardware level:

• Level 1: All Failed IC's
  All failed ICs on the module are displayed in red on the Main Operating Window to help the users pinpoint the cause of the module failure.
• Level 2: All Failed DQ's
  If the users double-click each individual IC, a sub-window will show the actual Failed DQ corresponding to the Failed IC in red.

Shmoo Plot

A two-dimensional diagram that shows the status of the DQ bits of Memory ICs varying over a range of the users' selected parameters (timing and input voltage levels).

Bit Failure Mapping

A tool that helps users find and display the failed DQ bits in the RAM. The corresponding row and column address the failed DQ bits, which will be spotted and dsiplayed for the users.

Pattern Programming

The users can use a C-programming language to create a customized AC command test pattern. The function also serves as a compiler tool and allows the users to test the operation algorithm of the DIMM module.

Address/ Data Logging

Error logging involves address and data information. Address/ data error logging provides the additional tool for the users to characterize devices and analyze failures.

DDR5 UDIMM/ SODIMM Specifications

Item	Description
Switching Data Rate	3200, 3600, 4200, 4800, 5200, 5800, and 6400 Mbps
Test Frequency	1600 MHz to 3200 MHz
I/O voltage	1.10V DRAM I/O
Clock Lines	4 pairs per site
Channel Architecture *1	32-bit data per channel (32-bit data) x 2 channels per rank, total 64 bits per rank
Address Depth	18 Rows, 10 Columns, 3/2 BGs/ BAs per site
Data Width	Supports x8/ x16 devices
Bank Group & Burst Length	8 Bank Group/ 32 Banks, BL16
ECC	NONE/ (64 bits)
Termination	On-chip, dynamic
Variable Timing Edges	tSU/ tHD, tAC (tDS/ DH), tDQSS, tWD, etc
Programmable Timing	tSU/ tHD, tWD, tDQSS, tAC, Tsref, Tref, etc

Variable Power Supplies: (Based on each site supply, depend on IC types)

DDR5 Powers are controlled by PMIC on the DIMM

Remark *1: TCIII-6400ST - Supports Non-ECC, 64 bits UDIMM/ SODIMM

Minimum Hardware Requirements

Item	Description
External PC requirements	Windows 10 or above, networking interface.
	Minimum Requirements - Runs TCIII-6400STR software to control operation. - Windows 10 operating system or above - i7-core above, 16G RAM above - Display card or on board display - CD-ROM, LAN port x 2, USB port - 1920 x 1080 monitor, keyboard, mouse
Remark: The configuration of PC will affect the testing efficient.
AC Power Source	110-240V (AC), 50/60Hz
Recommended Temperature	16°C to 32°C (60.8°F to 89.6°F) Please keep enviroment ventilated.
Recommended Humidity	20% to 80%

Software Screenshots