The TCIII-3200STDRIC DDR4 & DDR3 IC Test System
A Next Generation Memory Testing for Today's Businesses
To assist manufacturers in their efforts to control costs, TurboCATS proudly introduces the high efficiency TCIII-3200STDRIC DDR4/DDR3 IC test system.
Device characterization and failure analysis tools such as Shmoo Plot and Address/Data Error Logging are included on the TurboCATS III-3200ST test system to assist engineers in their design/debug processes. An optional None-Cable HiFix and hot temperature chamber are available to maximize your testing businesses.
TurboCATS is pioneering a high performing None-Cable HiFix unit integrated with our high performance TCIII-3200STDRIC (DDR4/3 IC) or TCIII-3200STLPIC (LPDDR4/3 IC) test system. The test system is connected to the IC socket board via TurboCATS' None-Cable HiFix unit, which is cableless to maximize the performance of the signal transmission. This ensures that the test system is easy to maintain since the user no longer needs to go through hundred of cable wires within the unit.
Productivity with customization
- DDR4 - supports speeds up to 3200Mbps
- DDR3 - supports speeds up to 1866Mbps
- Configurable from 6-site to 256-site in parallel testing
- Number of sites for the chassis can be requested by the customers
- Supports None-Cable HiFix for integrating to selective handler interface
What is None-Cable HiFix?
Speed, signal integrity and costs are the challenges for building a HiFix unit integrated to the automated handler system. The conventional HiFix comes with a large bundle of long cable wires to connect with the HiFix and IC socket boards. It causes signal degradation and timing jitter due to the impedance mismatching, conductor losses, radiation effects, etc. It is also difficult to maintain and repair any problems that need to go through a large bundle of cable wires.
Test up to 256 DDR4/3 Devices in Parallel
The TCIII-3200STDRIC (DDR4/DDR3) IC test system can be networked so the user can test up to 256 devices using one PC to control the entire operation. This gives the customer greater flexibility in terms of increasing testing capacity on as need basis. Cost are minimized since there will be no need for additional man labor to handle the increased capacity.
Handler Interface (optional)
The Ideal Testing Solution for Growing Businesses.
- Supports up to 256 DUTs on the DDR4/DDR3 IC test system
- Supports both manual and automated handler testing
- It can be integrated to various handlers with/without the None-Cable HiFix
M6771AD / M6741AD Handler
- Supports DDR4/DDR3 IC up to
64 DUT's or 128 DUT's
- Supports DDR4/DDR3 IC up to 256 DUT's
- DDR4 - 1600, 1866, 2133, 2400, 2667, 2866, 2933, 3200 Mbps
- DDR3 - 1333, 1600, 1866 Mbps
- Clock frequency from 667MHz to 1600MHz
- Configurable from 6-site to 256-site for parallel testing
- Proper chassis design to meet various selective handlers requirement
- Supports custom load boards for manual test
- Supports None-Cable HiFix for integrating to selective handler interface
- Optional environmental tests from low and high temperatures ranging from -30°C to 125°C
- Optional heat chamber is available
GUI Failure Analysis Tool
- Graphical Failure displays Failed Bad IC's and DQ pins' location
- Error logging location of Row/Column/Blanks/Burst/DQ's for analyze failures
- Address Scramble / Data Scramble
- Optional tools include Bit Failure Mapping and Schmoo Plot to display the failed Blanks(s) / DQ's bit in the RAM
AC & DC Parametric Tests
- Supports ISVM (Contact open pins) and VSIM (Leakage current)
- Supports AC/DC/Idd's parametric test; Continuity, Leakage, Idd's checking
- Over 35 industry standard test patterns and user script pattern programming are available
- Supports SPD programming, Read/Write test, and write-protect, etc.
- Auto Timing Calibration calibrates the tester and performs test on different types of IC's
Powerful Integration Tool
Combination of Failures
- Functional Failure: Cell stuck-at, coupling, neighborhood sensitivity and software error faults
- Parametric Failure: (AC) Speed timing vs. Vdd threshold, (DC) Leakage and Idd's
- Hot-Temperature Failure: System high temperature environment
GUI Failure Analysis
Graphical Identification of DQ's
Represents the failed DQ pins locations, graphically. The software uses a graphical picture to show the test failures at the hardware level: If the IC fails during the test, there would be indications (displayed in RED) marking the failed pin(s) and signal(s).
Address / Data Logging
Error logging can analyze failures by using address and data information.
Bit Failure Mapping
A tool that helps the user to find and display the failed DQ bits in the RAM. The corresponding row and column addresses the failed DQ bits, which will be spotted and displayed for the user.
Address Scramble allows users to redefine an address line logic to the address.
Data Scramble is based on the input addresses which determines write data or /data.
A two-dimensional diagram that shows the status of the DQ bits of Memory ICs varying over a range of the user's selected parameters (timing and input voltage level).
Script Code Function (optional)
Script Code Debugger
The customer can use a script programming language to create a customized test pattern. It also supports up to maximum 2048 data patterns. The Script Code function also serves as a powerful compiler/debug tool. It contains a built-in compiler and debugger for Script Code programming that allows the user to monitor the timing waveform of the programming algorithm along with the timing bus transactions. This is all accomplished under the Signal Tap tool.
Specifications: DDR3 & DDR4
|Test Frequency||DDR3||667Mhz to 933Mhz|
|DDR4||800Mhz to 1600Mhz|
|Switching Data Rate||DDR3||1333Mbps to 1866Mbps|
|DDR4||1600Mbps to 3200Mbps|
|I/O Interface||DDR3||SSTL-15, Class I & Class II
SSTL-135, Class I & Class II
|DDR4||POD12-1.2V Pseudo Open Drain I/O|
|Clock Lines||1 pair per site|
|Address Depth||DDR3||16 Rows, 15 Columns, 3 BAs
16X/15Y/3Z per site
|DDR4||18 Rows, 15 Columns, 4 BAs
18X/15Y/4Z per site
|Data Width||Supports x 4 / 8 / 16 / 32 bit IC Device|
|Variable Timing Edges||tSU/tHD, tAC(tDS/DH), tDQSS, tWD|
|Programmable Timing||tSU/tHD, tWD, tDQSS, tAC, Tsref, Tref, etc.|
|Control PC Requirement||Windows 7 (64 bit) or better, Networking interface|
|AC Power Source||110-240VAC, 50/60Hz|
|External PC Requirements
|Executes TCIII-3200IC program to control station operation.
Windows 7 (64 bit) operating system or better, i7-core or better, 8G RAM or better, CD DOM, LAN port x 2, USB port, 1920x1080 monitor, keyboard, mouse, display card on board display
TCIII-3200STDRIC (DDR3/4) & Heat Chamber (optional)
The heat chamber creates a hot testing environment to simulate the accelerated life testing and analyze the behaviors of the module.
Heat Chamber Specifications:
|Power Supply||220V, 50Hz (90 - 110% of rated voltage)|
|Power Consumption:||Power-up : 15A, 220V
Normal operation : 10A, 220V
|Display Method||7 Segment LED Display
Processing value (PV) : Green
Setting value (SV) : Red
|Display Accuracy:||F.S ±0.5% rdg ±1 digit based on SV or 3°C Max.|
|Sampling Time||0.5 sec. fixed|
|Vibration:||0.75mm amplitude at frequency of 10-55Hz in each of X, Y, Z directions for 2 hours|
|Ambient Temperature||-10 - 50°C|
|Storage Temperature||-20 - 60°C|
|Ambient Humidity||35 - 85% RH|
|Temperature Range||25°C - 85°C|
|Recommend Setting Temperature||80°C|
|Air Input||Min. 0.5 MPa - Max. 1.0 MPa
Min. 75 psi - 145 psi
|Diameter of Gas Tube||6 mm|
Main Operating Window
Scrip Code Program
Signal Tap Tool
TURBOCATS, LTD. RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind.